Flavors Technology Incorporated

Slide 11 of 24

The above is another illustration of the PIM frame.

At the beginning of each frame, I/O data is read from shared memory. During the process stage, all tiles are executed. Finally, results of that processing are written out to shared memory.

All shared memory accesses are coherent. By this, we mean that on any given frame all tiles that read a given shared memory location are guaranteed to read the same value.

Note that in order to preserve shared memory coherency, the I/O reads and writes must be coherent to the PIM frame. Specifically, when the tiles are reading from shared memory, the I/O must read from shared memory, and when the tiles are writing to shared memory, the I/O must perform its writes to shared memory.